Pascal and Francis Bibliographic Databases

Help

Search results

Your search

kw.\*:("Circuit VLSI")

Document Type [dt]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Publication Year[py]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Discipline (document) [di]

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Language

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Author Country

A-Z Z-A Frequency ↓ Frequency ↑
Export in CSV

Results 1 to 25 of 6079

  • Page / 244
Export

Selection :

  • and

An overview and a selected bibliography of the VLSI/microprocessor-based data modem designMEDINA, D; MILUTINOVIC, V.Microprocessing and microprogramming. 1985, Vol 16, Num 2-3, pp 143-161, issn 0165-6074Article

The influence of boundary locations on wiring capacitance simulationSHIGYO, N; FUKUDA, S; KATO, K et al.I.E.E.E. transactions on electron devices. 1989, Vol 36, Num 6, pp 1171-1174, issn 0018-9383, 4 p.Article

SPECIAL ISSUE ON THE 2011 SYMPOSIUM ON VLSI CIRCUITSMAKOTO NAGATA; VIVEK DE.IEEE journal of solid-state circuits. 2012, Vol 47, Num 4, issn 0018-9200, 272 p.Conference Proceedings

Special Issue on the 2010 Symposium on VLSI CircuitsAMERASEKERA, Ajith; NAGATA, Makoto.IEEE journal of solid-state circuits. 2011, Vol 46, Num 4, issn 0018-9200, 275 p.Conference Proceedings

The VLSI circuit test problem ― a tutorialHAWKINS, C. F; NAGLE, H. T; FRITZEMEIER, R. R et al.IEEE transactions on industrial electronics (1982). 1989, Vol 36, Num 2, pp 111-116, issn 0278-0046Article

Supercomputers and VLSI: The effect of large-scale integration on computer architectureSNYDER, L.Advances in computers. 1984, Vol 23, pp 1-33, issn 0065-2458Article

Placement algorithms for custom VLSISUPOWIT, K. J; SLUTZ, E. A.Computer-aided design. 1984, Vol 16, Num 1, pp 45-50, issn 0010-4485Article

A high-storage capacity content-addressable memory and its learning algorithmVERLEYSEN, M; SIRLETTI, B; VANDEMEULEBROECKE, A et al.IEEE transactions on circuits and systems. 1989, Vol 36, Num 5, pp 762-766, issn 0098-4094, 5 p.Article

TRANSIT AND STORAGE TIMES OF BIPOLAR TRANSISTORS IN A VLSI ENVIRONMENTROFAIL SS.1983; IEE PROCEEDINGS. PART I. SOLID-STATE AND ELECTRON DEVICES; ISSN 0143-7100; GBR; DA. 1983; VOL. 130; NO 3; PP. 151-152; BIBL. 7 REF.Article

Special Issue on the 2008 Symposium on VLSI CircuitsNAKAMURA, Katsu; MIZUNO, Masayuki.IEEE journal of solid-state circuits. 2009, Vol 44, Num 4, issn 0018-9200, 279 p.Conference Proceedings

ACM Great Lakes Symposium on VLSISTINE, James E; ZUKOWSKI, Charles A.Integration (Amsterdam). 2005, Vol 38, Num 3, issn 0167-9260, 211 p.Conference Proceedings

An associative memory based on hybrid SEED technologyGRIMM, G; FEY, D.SPIE proceedings series. 1998, pp 339-342, isbn 0-8194-2949-XConference Paper

Interconnection networks for sea-of-gates VLSI : Comparative analysis of performance and complexityMILUTINOVIC, D.International conference on microelectronic. 1997, pp 845-847, isbn 0-7803-3664-X, 2VolConference Paper

Genetic algorithm for embedding a complete graph in a hypercube with a VLSI applicationCHANDRASEKHARAM, R; VINOD, V. V; SUBRAMANIAN, S et al.Microprocessing and microprogramming. 1994, Vol 40, Num 8, pp 537-552, issn 0165-6074Article

VLSI reliability challenges : from device physics to wafer scale systemsTAKEDA, E; IKUZAKI, K; KATTO, H et al.Proceedings of the IEEE. 1993, Vol 81, Num 5, pp 653-674, issn 0018-9219Article

A test methodology for wafer scale systemsLANDIS, D. L.IEEE transactions on computer-aided design of integrated circuits and systems. 1992, Vol 11, Num 1, pp 76-82, issn 0278-0070Article

An O(nlogm) algorithm for VLSI design rule checkingBONAPACE, C. R; LO, C.-Y.IEEE transactions on computer-aided design of integrated circuits and systems. 1992, Vol 11, Num 6, pp 753-758, issn 0278-0070Article

Partitioning algorithms for layout synthesis from register-transfer netlistsWU, A. C.-H; GAJSKI, D. D.IEEE transactions on computer-aided design of integrated circuits and systems. 1992, Vol 11, Num 4, pp 453-463, issn 0278-0070Article

SATPOLY: a self-aligned tungsten on polysilicon process for CMOS VLSI applicationsMAN WONG; SARASWAT, K. C.I.E.E.E. transactions on electron devices. 1989, Vol 36, Num 7, pp 1355-1361, issn 0018-9383, 7 p.Article

Impact of the gate-drain overlapped device (GOLD) for deep submicrometer VLSIIZAWA, R; KURE, T; TAKEDA, E et al.I.E.E.E. transactions on electron devices. 1988, Vol 35, Num 12, pp 2088-2093, issn 0018-9383Article

Conducting transition metal oxides: possibilities for RuO2 in VLSI metallizationKRUSIN-ELBAUM, L; WITTMER, M.Journal of the Electrochemical Society. 1988, Vol 135, Num 10, pp 2610-2614, issn 0013-4651Conference Paper

Applications of Hi-BiCMOS technologyNISHIO, Y; OGIUE, K; KADONO, S et al.Hitachi review. 1986, Vol 35, Num 5, pp 225-230, issn 0018-277XArticle

VLSI architecture of bit-serial quasicyclic encodersWANG, Q; EL QUIBALY, F. H; BHARGAVA, V. K et al.Electronics Letters. 1986, Vol 22, Num 22, pp 1170-1171, issn 0013-5194Article

The cosmic cubeSEITZ, C. L.Communications of the ACM. 1985, Vol 28, Num 1, pp 22-33, issn 0001-0782Article

Efficient bit-level systolic arrays for inner produit computationURQUHART, R. B; WOOD, D.GEC journal of research. 1984, Vol 2, Num 1, pp 52-55, issn 0264-9187Article

  • Page / 244